1. Field of the Invention
This invention relates to the field of digital audio signal reproduction, and in particular to an audio decoder having a high-sampling rate output interface and a decimated sampling rate output interface which operate concurrently.
2. Description of the Related Art
Sound reproduction is ultimately accomplished by applying an analog signal to a sound transducer. As the sound transducer is typically a separate component, the final stage of any digital audio reproduction device comprises a digital-to-analog converter, a smoothing filter, an amplifier stage, and sometimes an equalizer stage. The digital-to-analog converter accepts digital audio samples of a given resolution (i.e. bit-width), and converts them into analog signal values that are then smoothed and amplified by the remaining stages.
Consider a system which comprises a digital audio reproduction device and a special-purpose digital audio processing device. One example of such a system might be a DVD multimedia playback system and a high-end stereo system equalizer. Since the second device is capable of operating on the digital audio samples available within the first device, it is desirable for the first device to provide access to the digital audio samples even as the first device provides an analog output signal. Before discussing this further, background information on input and output standards is first presented.
A linear pulse code modulation (LPCM) standard for encoded audio programs has been defined within the DVD multimedia standard that allows for audio sampling frequencies of 48 kHz and 96 kHz. The DVD standard is a complex one, but in essence a DVD bitstream consists of packets from various interleaved substreams. Each packet includes a packet header identifying the substream to which the packet belongs and the type of data carried by the packet. Packets which belong to an audio substream and carry linear PCM data further include a linear PCM block header carrying parameters for use by an LPCM audio decoder (e.g. gain, number of channels, bit width of audio samples), and a block of audio data, as shown by packet 10 in FIG. 1A. The format of the audio data in the block is dependent on the bit-width of the samples. FIG. 1B shows how the audio samples in the audio data payload may be stored for 16-bit samples. In this example, the 16-bit samples made in a given time instant are stored as left (LW) and right (RW), followed by samples for any other channels (XW). Allowances are made for up to 8 channels. FIG. 1C shows how the audio samples in the audio data payload are stored for 20-bit samples. In this example, byte-alignment is preserved by grouping sample times into pairs. The most significant 16 bits for samples in the paired time instants are stored in the same manner as before. The remaining nibbles are grouped together following the 16-bit words. The nibbles are packed in the same order as the previous portions of the samples, i.e. LN1,RN1,XN1,LN2,RN2,XN2. FIG. 1D shows how the audio samples in the audio data payload are stored for 24-bit samples. In this example, the portions of the audio samples are ordered in the same manner as FIG. 1C. The primary difference is that the remaining portions (4-bit nibbles in the previous example) are now 8-bit bytes.
IEC 958 is another international standard has been defined for digital audio communications between electronic components at 48 kHz. IEC 958 (published 1989) is a serial, uni-directional, self-clocking interface for interconnecting digital audio equipment. It employs bi-phase mark channel coding and a framing protocol in which each frame corresponds to an audio sampling time instant. Each frame consists of a subframe for each channel, and each sub-frame carries a single audio sample preceded by a synchronization preamble and followed by status flags and a parity bit.
Many high-end digital-to-analog converters (DACs) can operate at sampling frequencies of 96 kHz, and whenever possible, it is preferable to operate at this higher frequency due to the improved sound quality. However, the sampling frequency specified for an IEC 958 output port is 48 kHz. It is desirable for an audio decoder to simultaneously provide a 96 kHz decoded digital output sequence and a 48 kHz decoded digital output sequence when presented with a 96 kHz encoded audio signal in order to support both a high end DAC and an IEC 958 interface. It is further desirable to provide the two output sequences with a minimal time offset so as to avoid humanly-perceptible delays between reproduced audio signals from the two sequences.